The present invention relates to a data transfer control method and apparatus, and more particularly, to a data transfer control method and apparatus which enables a high speed data transfer between units through a buffer memory constituted of cheap and large capacity dynamic random access memories (DRAM) or the like.
In external storages for a computer system, for example, a magnetic disk drive unit, for the purpose of matching the data transfer between a host or initiator device (e.g. a host computer) having, for example, a large data transfer capacity and a peripheral device or target device with a relatively slow data transfer speed due to a rotational delay, improving the data transfer efficiency therebetween, and so on, it is known that a buffer memory constituted of semiconductor memory elements such as DRAM is provided in part of a magnetic disk drive control unit disposed between a magnetic disk drive unit and a host.
On the other hand, a conventional access priority arbitration technique is disclosed, for example, in JP-A-2-5286. This conventional technique is known as a method of improving the data transfer efficiency achieved by reducing a read/write cycle time of DRAM using a page mode, and switching the priority order of competing read and write with a refresh cycle to match the frequencies of read and write processings.
A refresh request for DRAMs has been generally processed with the first priority for ensuring the data fidelity, as described in the above-mentioned document.